SN65LVDS100DGKTI* Designed for Signaling Rates ≥ 2Gbps * Total Jitter * Low-Power Alternative for the MC100EP16 * Low 100-ps (Maximum) Part-to-Part Skew * 25mV of Receiver Input Threshold Hysteresis Over 0-V to 4V Common-Mode Range * Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels * 3.3V Supply Operation * LVDT Integrates 110Ω Terminating Resistor * Offered in SOIC and MSOP
¥
25.23
显示的图像仅供参考,应从产品数据表中获得准确的规格。
SN65LVDS100DGKTI
制造商:
TI
制造商型号#:
SN65LVDS100DGK
百芯编号#:
CM10155830
价格(CNY):
¥
25.23
百芯库存:
239
个
库存地点:
可供应量:
172
个在库
此为供应商库存,需要与销售确认
产品类别:
电压电平,转换器
产品描述:
* Designed for Signaling Rates ≥ 2Gbps * Total Jitter * Low-Power Alternative for the MC100EP16 * Low 100-ps (Maximum) Part-to-Part Skew * 25mV of Receiver Input Threshold Hysteresis Over 0-V to 4V Common-Mode Range * Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels * 3.3V Supply Operation * LVDT Integrates 110Ω Terminating Resistor * Offered in SOIC and MSOP
The SN65LVDS100DGK is a 2Gbps LVDS/LVPECL/CML to LVDS Repeater/Translator formed by connecting high-speed differential receivers and drivers. The receiver accepts low-voltage differential signaling (LVDS), positive-emitter-coupled logic (PECL) or current-mode logic (CML) input signals at rates up to 2Gbps and repeats it as either an LVDS or PECL output signal. The signal path through the device is differential for low radiated emissions and minimal added jitter. The output is LVDS levels as defined by TIA/EIA-644-A. The output is compatible with 3.3V PECL levels. Both drive differential transmission lines with nominally 100R characteristic impedance. It includes an 110R differential line termination resistor for less board space, fewer components and the shortest stub length possible. It does not include the VBB voltage reference. The VBB provides a voltage reference of typically 1.35V below VCC for use in receiving single-ended input signals.
Low power alternative for the MC100EP16
Inputs electrically compatible with LVPECL, CML and LVDS signal levels
<65ps Total jitter
Low 100ps (Maximum) part-to-part skew
25mV of Receiver input threshold hysteresis over 0 to 4V input voltage range