The SN65LBC173D is a quadruple low-power monolithic differential Line Receiver with 3-state outputs. Designed to meets the requirements of the ANSI standards EIA/TIA-422-B, EIA/TIA-423-B, RS-485 and ITU recommendations V.10 and V.11. The device is optimized for balanced multipoint bus transmission at data rates up to and exceeding 10 million bits per second. The four receivers share two ORed enable inputs, one active when high, the other active when low. Each receiver features high input impedance, input hysteresis for increased noise immunity and input sensitivity of ±200mV over a common-mode input voltage range of -7 to +12V. Failsafe design ensures that if the inputs are open circuited, the output is always high. It is designed using the Texas Instruments proprietary LinBiCMOS™ technology that provides low power consumption, high switching speeds and robustness.
Open-circuit failsafe design
Designed to operate with pulse durations as short as 20ns
Designed for multi-point bus transmission on long bus lines in noisy environments
