The SMJ320F240 is a member of a family of digital signal processor (DSP) controllers based on the TMS320C2xx generation of 16-bit fixed-point DSPs. This family is optimized for digital motor/motion control applications and contains 16K words of flash memory on chip. The DSP controller combines the enhanced TMS320 architectural design of the C2xLP core CPU for low-cost, high-performance processing capabilities and several advanced peripherals optimized for motor/motion control applications. These peripherals include the event manager module, which provides general-purpose timers and compare registers to generate up to 12 PWM outputs, and a dual 10-bit analog-to-digital converter (ADC), which can perform two simultaneous conversions within 6.1 μs.
• Processed to MIL-PRF-38535 (QML)
• High-Performance Static CMOS Technology
• Includes the T320C2xLP Core CPU
- Object Compatible With the TMS320C2xx Family
- Source Code Compatible With SMJ320C25
- Upwardly Compatible With SMJ320C50
- 50-ns Instruction Cycle Time D Memory
- 544 Words × 16 Bits of On-Chip Data/Program Dual-Access RAM
- 16K Words × 16 Bits of On-Chip Program Flash EEPROM
- 224K Words × 16 Bits of Total Memory Address Reach (64K Data, 64K Program and 64K I/O, and 32K Global Memory Space)
