The Altera enhanced configuration device is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. The core of an enhanced configuration device is divided into two major blocks, a configuration controller and a flash memory. The flash memory is used to store configuration data for systems made up of one or more Altera FPGAs. Unused portions of the flash memory can be used to store
processor code or data that can be accessed via the external flash interface after FPGA configuration is complete.
Features
■ Enhanced configuration devices include EPC4, EPC8, and EPC16 devices
■ Single-chip configuration solution for Stratix® series, Cyclone™ series, APEX™ II, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), Mercury™, ACEX® 1K, and FLEX® 10K (FLEX 10KE and FLEX 10KA) devices
■ Contains 4-, 8-, and 16-Mbit flash memories for configuration data storage
● On-chip decompression feature almost doubles the effective configuration density
■ Standard flash die and a controller die combined into single stacked chip package
■ External flash interface supports parallel programming of flash and external processor access to unused portions of memory
● Flash memory block/sector protection capability via external flash interface
● Supported in EPC16 and EPC4 devices
■ Page mode support for remote and local reconfiguration with up to eight configurations for the entire system
● Compatible with Stratix series Remote System Configuration feature
■ Supports byte-wide configuration mode fast passive parallel (FPP); 8-bit data output per DCLK cycle
■ Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs
■ Pin-selectable 2-ms or 100-ms power-on reset (POR) time
■ Configuration clock supports programmable input source and frequency synthesis
