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EN033 (v1.3) September 12, 2007 www.xilinx.com 1
Errata Notice
© 2007 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Introduction
Thank you for your interest in the Xilinx Spartan™-3AN family XC3S700AN FPGA device engineering samples. Although
Xilinx has made every effort to ensure the highest possible quality, these devices are subject to the limitations described in
this errata notification. These errata do not apply to the XC3S700AN production FPGAs.
Device Identification
These errata apply to the XC3S700AN engineering samples as shown in Ta ble 1. See the top marking in Figure 1.
Traceability
XC3S700AN engineering samples are marked as shown in Figure 1. The other devices listed in Ta ble 1 are marked simi-
larly.
0
Spartan-3AN XC3S700AN FPGA
Errata for Engineering Samples
EN033 (v1.3) September 12, 2007
00
Errata Notice
Ta ble 1 : XC3S700AN Devices Affected by These Errata
Device Types XC3S700AN
Packages All
Speed Grades -4
Date Codes All
Marked as "ES" Yes
Figure 1: XC3S700AN FPGA Top Marking
Date Code
Lot Code
Operating Range
Device Type
Package
Speed Grade
Fabrication/
Process Code
Mask Revision
Engineering Sample
™
XGQ####FGG484
XC3S700AN
®
SPARTAN
®
X#######X
4C ES
EN033_01_091107
