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SN74F112NE4 数据手册 Datasheet - TI

更新时间： 2024/05/29 03:21:10 (UTC+8)

SN74F112NE4 数据手册PDF (13 页)

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SN74F112NE4 文档

SN74F112NE4 数据手册

13 页, 640 KB

DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET

TEXAS INSTRUMENTS SN74F112N Flip-Flop, Complementary, Differential, Negative Edge, 74F112, JK, 4.6ns, 100MHz, 20mA, DIP

Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC

TEXAS INSTRUMENTS SN74F112D Flip-Flop, 74F112, JK, 4.6ns, 130MHz, 20mA, SOIC

Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R

Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R

Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC T/R

Flip Flop JK-Type Neg-Edge 2Element 16Pin PDIP Tube

Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC T/R

Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R

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