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Rev. 0.3 10/12 Copyright © 2012 by Silicon Labs Si53301/4-EVB
Si53301/4-EVB
Si53301/4 EVALUATION BOARD USER’S GUIDE
Description
The Si53301/4-EVB is used for evaluation of the
Si533xx family of low-jitter clock buffers/level
translators. As shipped from the factory, this evaluation
board has the Si53301 device installed. The entire
Si533xx family of buffers use the same input circuits and
output drivers, and all have the same jitter
specifications. Thus, this evaluation board can be used
to evaluate any Si533xx device. The Si53301 provides
pin-selectable clock output signal format, drive strength
control, optional clock division, and per-bank output
enable. The Si53304 provides pin-selectable clock
output signal format, drive strength control, and
individual output enable pins for each clock output.
EVB Features
Features of this evaluation board include:
Power supply connections for VDD, VDDOA and
VDDOB, GND
Jumpers for selection of output signal format, output
enable, input clock select and output divider
Jumpers to allow self biasing of CMOS single-ended
inputs
SMA connectors for easy access to test and
evaluate the Si53301
Figure 1. Si53301/4 Evaluation Board