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dc2266af
DEMO MANUAL DC2266A
DESCRIPTION
LTC2107 and LTC6409
16-Bit, 210Msps ADC with DC-
Coupled Driver
Demonstration circuit 2266A features the LT C
®
2107,
210Msps ADC, and the LTC6409 low noise amplifier.
DC2266A supports the LTC2107 DDR LVDS output mode.
The circuitry on the analog inputs is optimized for analog
input frequencies from DC to 100MHz. When driven with
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and PScope
is a trademark of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
PERFORMANCE SUMMARY
a 50Ω source, the gain will be 6dB. To modify the input for
other input ranges or gains refer to the LTC6409 data sheet.
Design files for this circuit board are available at
http://www.linear.com/demo/DC2266A
Specifications are at T
A
= 25°C
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage – LTC2107 (V
IN
)
This Supply Must Provide Up to 800mA 3.3 5.0 V
Supply Voltage – LTC6409 (AMPV
CC
)
This Supply Must Provide Up to 75mA 3.3 5.0 V
Analog Input Range Depending on PGA Setting 1.6 2.4 V
P-P
Maximum Input Level at J1 and J2 2.4V
P-P
Input Range 1.2 V
P-P
1.6V
P-P
Input Range 0.8 V
P-P
Logic Input Voltages Minimum Logic High 1.2 V
Maximum Logic Low 0.6 V
Logic Output Voltages (Differential) Nominal Logic Levels (100Ω Load, 3.5mA
Mode, 1.25V Common Mode)
0.350 V
Minimum Logic Levels (100Ω Load, 3.5mA
Mode, 1.25V Common Mode)
0.247 V
Sampling Frequency (Encode Clock Frequency) 10 210 MHz
Convert Clock Level (Single ended) Minimum Logic Levels (ENC
–
Tied to GND) 0 2.5 V
Convert Clock Level (Differential) Minimum Logic Levels (ENC
–
Not Tied to GND,
1.2V Common Mode)
0.2 V
