下载
Micro PMU with 0.8 A Buck, Two 300 mA LDOs
Supervisory, Watchdog and Manual Reset
Data Sheet
ADP5042
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2010-2011 Analog Devices, Inc. All rights reserved.
FEATURES
Input voltage range: 2.3 V to 5.5 V
One 0.8 A buck regulator
Two 300 mA LDOs
20-lead, 4 mm × 4 mm LFCSP package
Initial regulator accuracy: ±1%
Overcurrent and thermal protection
Soft start
Undervoltage lockout
Open drain processor reset with threshold monitoring
±1.5% threshold accuracy over the full temperate range
Guaranteed reset output valid to V
CC
= 1 V
Dual watchdog for secure systems
Watchdog 1 controls reset
Watchdog 2 controls reset and regulators power cycle
Buck key specifications
Current mode topology for excellent transient response
3 MHz operating frequency
Uses tiny multilayer inductors and capacitors
Mode pin selects forced PWM or auto PFM/PSM modes
100% duty cycle low dropout mode
LDOs key specifications
Low V
IN
from 1.7 V to 5.5 V
Stable with1 µF ceramic output capacitors
High PSRR, 60 dB PSRR up to 1 kHz/10 kHz
Low output noise
110 µV rms typical output noise at V
OUT
= 2.8 V
Low dropout voltage: 150 mV at 300 mA load
−40°C to +125°C junction temperature range
HIGH LEVEL BLOCK DIAGRAM
FPWM
PSM/PWM
MODE
SW
VOUT1
PGND
C6
10µF
V
OUT1
AT
800mA
L1
1µH
EN_BK
BUCK
EN_LDO1
LDO1
(DIGITAL)
EN_LDO2
LDO2
(ANALOG)
SUPERVISOR
MICROPROCESSOR
VIN1
EN3
AVIN
AVIN
EN1
VIN2
VIN3
EN2
AGND
C2
1µF
VOUT2
VOUT3
WSTAT
WDI1
WDI2
nRSTO
V
OUT2
AT
300mA
C4
1µF
V
OUT3
AT
300mA
C5
4.7µF
ON
OFF
ON
OFF
ON
OFF
VIN1 = 2.3V
TO 5.5V
AVIN
R
FILT
= 30Ω
VIN2 = 1.7V
TO 5.5V
MR
C1
1µF
VIN3 = 1.7V
TO 5.5V
C3
1µF
08811-001
Figure 1.
GENERAL DESCRIPTION
The ADP5042 combines one high performance buck regulator
and two low dropout regulators (LDO) in a small 20-lead
LFCSP to meet demanding performance and board space
requirements.
The high switching frequency of the buck regulator enables
use of tiny multilayer external components and minimizes the
board space.
The MODE pin selects the buck mode of operation. When set
to logic high, the buck regulators operate in forced PWM mode.
When the MODE pin is set to logic low, the buck regulators
operate in PWM mode when the load is around the nominal
value. When the load current falls below a predefined threshold
the regulator operates in power save mode (PSM) improving
the light-load efficiency.
The low quiescent current, low dropout voltage, and wide input
voltage range of the ADP5042 LDOs extend the battery life of
portable devices. The two LDOs maintain power supply
rejection greater than 60 dB for frequencies as high as 10 kHz
while operating with a low headroom voltage.
Each regulator is activated by a high level on the respective
enable pin. The ADP5042 is available with factory programmable
default output voltages and can be set to a wide range of options.
The ADP5042 contains supervisory circuits that monitor
power supply voltage levels and code execution integrity in
microprocessor-based systems. They also provide power-on
reset signals. An on-chip dual watchdog timer can reset the
microprocessor or power cycle the system (Watchdog 2) if it
fails to strobe within a preset timeout period.
页面指南
