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Tiny 16-/14-/12-Bit SPI nanoDAC+, with
±2 (16-Bit) LSB INL and 2 ppm/°C Reference
Data Sheet
AD5683R/AD5682R/AD5681R/AD5683
Rev. 0 Document Feedback
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FEATURES
Ultrasmall package: 2 mm × 2 mm, 8-lead LFCSP
High relative accuracy (INL):
±2 LSB maximum at 16 bits
AD5683R/AD5682R/AD5681R
Low drift, 2.5 V reference: 2 ppm/°C typical
Selectable span output: 2.5 V or 5 V
AD5683
External reference only
Selectable span output: V
REF
or 2 × V
REF
Total unadjusted error (TUE): 0.06% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.05% of FSR maximum
Low glitch: 0.1 nV-sec
High drive capability: 20 mA
Low power: 1.2 mW at 3.3 V
Independent logic supply: 1.8 V to 5.5 V
Wide operating temperature range: −40°C to +105°C
Robust 4 kV ESD protection
APPLICATIONS
Process controls
Data acquisition systems
Digital gain and offset adjustment
Programmable voltage sources
FUNCTIONAL BLOCK DIAGRAM
Figure 1. AD5683R/AD5682R/AD5681R MSOP
(For more information, see the Functional Block Diagrams—LFCSP section.)
GENERAL DESCRIPTION
The AD5683R/AD5682R/AD5681R/AD5683, members of the
nanoDAC+® family, are low power, single-channel, 16-/14-/12-bit
buffered voltage out DACs. The devices, except the AD5683,
include an enabled by default internal 2.5 V reference, offering
2 ppm/°C drift. The output span can be programmed to be 0 V to
V
REF
or 0 V to 2 × V
REF
. All devices operate from a single 2.7 V to
5.5 V supply and are guaranteed monotonic by design. The
devices are available in a 2.00 mm × 2.00 mm, 8-lead LFCSP or
a 10-lead MSOP.
The internal power-on reset circuit ensures that the DAC register
is written to zero scale at power-up while the internal output
buffer is configured in normal mode. The AD5683R/AD5682R/
AD5681R/AD5683 contain a power-down mode that reduces the
current consumption of the device to 2 μA (maximum) at 5 V and
provides software selectable output loads while in power-down
mode.
The AD5683R/AD5682R/AD5681R/AD5683 use a versatile
3-wire serial interface that operates at clock rates of up to 50 MHz.
Some devices also include asynchronous
RESET
pin and V
LOGIC
pin options, allowing 1.8 V compatibility.
Table 1. Single-Channel nanoDAC+ Portfolio
Interface Reference 16-Bit 14-Bit 12-Bit
SPI Internal AD5683R AD5682R AD5681R
SPI External AD5683
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL).
AD5683R/AD5683 (16-bit): ±2 LSB maximum.
2. Low Drift, 2.5 V On-Chip Reference.
2 ppm/°C typical temperature coefficient.
5 ppm/°C maximum temperature coefficient.
3. Two Package Options.
2.00 mm × 2.00 mm, 8-lead LFCSP.
10-lead MSOP.
AD5683R/
AD5682R/
AD5681R
V
REF
GND
LDAC
REF
V
DD
V
LOGIC
*
POWER-DOWN
CONTROL LOGIC
DAC
REGISTER
POWER-ON
RESET
2.5V
REF
OUTPUT
BUFFER
16-/14-/12-BIT
DAC
INPUT
CONTROL LOGIC
V
OUT
SCLK SDISYNC
RESET
*NOT AVAILABLE IN ALL THE MODELS
SDO*
RESISTOR
NETWORK
11955-001
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