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© 2007 Microchip Technology Inc. DS21952B-page 1
MCP23017/MCP23S17
Features
• 16-bit remote bidirectional I/O port
- I/O pins default to input
• High-speed I
2
C™ interface (MCP23017)
- 100 kHz
- 400 kHz
-1.7MHz
• High-speed SPI interface (MCP23S17)
- 10 MHz (max.)
• Three hardware address pins to allow up to eight
devices on the bus
• Configurable interrupt output pins
- Configurable as active-high, active-low or
open-drain
• INTA and INTB can be configured to operate
independently or together
• Configurable interrupt source
- Interrupt-on-change from configured register
defaults or pin changes
• Polarity Inversion register to configure the polarity
of the input port data
• External Reset input
• Low standby current: 1 µA (max.)
• Operating voltage:
- 1.8V to 5.5V @ -40°C to +85°C
- 2.7V to 5.5V @ -40°C to +85°C
- 4.5V to 5.5V @ -40°C to +125°C
Packages
• 28-pin PDIP (300 mil)
• 28-pin SOIC (300 mil)
• 28-pin SSOP
• 28-pin QFN
Package Types
QFN
2
3
4
5
6
1
7
V
SS
NC
15
16
17
18
19
20
21
GPA4
GPA3
GPA2
GPA1
GPA0
V
DD
INTB
SCL
SDA
NC
A0
A1
A2
RESET
232425262728 22
GPB3
GPB2
GPB1
GPB0
GPA7
GPA6
GPA5
10118 9 121314
MCP23017
GPB5
GPB6
GPB7
GPB4
INTA
GPB0
GPB1
GPB2
GPB3
INTA
GPB4
NC
NC
GPB5
GPB6
GPB7
SCL
GPA7
GPA6
GPA5
GPA4
GPA3
GPA2
GPA1
GPA0
V
DD
VSS
A2
A1
A0
SDA
• 1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PDIP,
MCP23017
INTB
RESET
SSOP
SOIC,
GPB0
GPB1
GPB2
GPB3
INTA
GPB4
SO
CS
GPB5
GPB6
GPB7
SCK
GPA7
GPA6
GPA5
GPA4
GPA3
GPA2
GPA1
GPA0
V
DD
VSS
A2
A1
A0
SI
• 1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MCP23S17
INTB
RESET
MCP23S17
MCP23017
QFN
2
3
4
5
6
1
7
V
SS
CS
15
16
17
18
19
20
21 GPA4
GPA3
GPA2
GPA1
GPA0
V
DD
INTB
SI
SO
A0
A1
A2
RESET
232425262728 22
GPB3
GPB2
GPB1
GPB0
GPA7
GPA6
GPA5
10118 9 121314
MCP23S17
GPB5
GPB6
GPB7
GPB4
INTA
SCK
PDIP,
SSOP
SOIC,
16-Bit I/O Expander with Serial Interface
