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AN-877
APPLICATION NOTE
One Technology Wa y • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Interfacing to High Speed ADCs via SPI
by the High Speed Converter Division
Rev. B | Page 1 of 20
INTRODUCTION
This application note describes how to use the serial peripheral
interface (SPI) port on Analog Devices, Inc., high speed converters.
In addition, this application note defines the electrical, timing,
and procedural requirements for interfacing to these devices.
The implementation is compatible with industry-standard SPI
ports and employs, at minimum, a 2-wire mode and optional
chip select.
DEFINITION
The SPI port consists of three pins: the serial clock pin (SCLK),
the serial data input/output pin (SDIO), and the chip select bar
pin (CSB). Optionally, some chips may implement a serial data
out pin (SDO), which is referred to as 3-wire mode. To minimize
pin count, most chips omit this pin. However, if it is included, it is
used only for reading data from the device.
CSB
SCLK
SCLK
SDIO
SDIO
CSB
SPI
CONTROLLER
CONVERTER
INTERFACE
05739-001
Figure 1. Single Device Control in 2-Wire Mode
05739-013
CSB 0
CSB 1
SCLK
SCLK
SCLK
SDIO
SDIO
SDIO
CSB
CSB
SPI
CONTROLLER
CONVERTER
INTERFACE
DEVICE 1
CONVERTER
INTERFACE
DEVICE 2
Figure 2. Multiple Device Control in 2-Wire Mode
